I/O SPACE REGISTERS AKA I/O Mapped I/O
Some CPU architectures (notably Intel x86) reference device registers using I/O machine instructions. These special instructions reference a specific set of pins on the CPU and therefore define a separate bus and address space for I/O devices. Addresses on this bus are sometimes known as ports and are completely separate from any memory address. On the Intel x86 architecture, the I/O address space is 64 KB in size (16 bits), and the assembly language defines two instructions for reading and writing ports in this space: IN and OUT.
Not all CPU architects see the need for a separate I/O address space, in which case device registers are mapped directly into the memory space of the CPU. Motorola processors are one such example. Similarly, it is possible (and common) to design hardware devices that interface to the memory address and data buses of a CPU even when that CPU supports separate I/O space. In some cases, devices (e.g., a video adapter) will touch both I/O and memory space.
Devices that expose large data buffers usually map into memory space. This allows fast and convenient access from high-level languages such as C. The simple and familiar dereferencing of a pointer permits direct access to a device’s buffer.
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Art Baker &Jerry Lozano
- Publisher: Prentice Hall PTR